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[tmp] for Nand DMA setting

tmp_todo crifan 640浏览 0评论

/* the interface for DMA controller of nand flash controller only provide:

DMACSREQ, DMACBREQ, DMACLSREQ, DMACLBREQ, DMACCLR,does not provider DMACxTC,

accoring to the PL080 datasheet says " Some peripherals do not require connection to the DMA terminal count signal. ", so here, not need set/enable the terminal count interrupt, so use:

(0 << PL08X_CCTL_TIC_SHIFT)   */

—————————————————————————————————-

#define DMA_NAF_LINE 4

/* described in ARM DDI 0196G == PL080, transfer size total is 12 bits: bit 0~11, so max allow value is 2^12-1=0x1000-1=0xFFF */

#define AS353X_NAF_WORDS_PER_LLI (0xFFF)

{/* for write to nand */
   .bus_id = "as353x-nand",
   .io_addr = AS353X_NAND_FLASH_BASE + NAF_DATA,
   .mode = DMA_TO_DEVICE,
   .cctl_opt = AS353X_NAF_WORDS_PER_LLI |
   (PL08X_CCTL_BSIZE_32 << PL08X_CCTL_SBURST_SHIFT) |
   (PL08X_CCTL_BSIZE_32 << PL08X_CCTL_DBURST_SHIFT) |
   (PL08X_CCTL_WIDTH_32 << PL08X_CCTL_SWIDTH_SHIFT) |
   (PL08X_CCTL_WIDTH_32 << PL08X_CCTL_DWIDTH_SHIFT) |
   (PL08X_CCTL_MASTER_2 << PL08X_CCTL_SMASTER_SHIFT) |
   (1 << PL08X_CCTL_SINCR_SHIFT) |
   (0 << PL08X_CCTL_TIC_SHIFT) ,
   .config_base = (DMA_NAF_LINE << PL08X_CCFG_DPERI_SHIFT) |
   (PL08X_CCFG_FCTL_MEM_TO_PERI << PL08X_CCFG_FCTL_SHIFT) |
   (1 << PL08X_CCFG_IE_SHIFT) | (1 << PL08X_CCFG_ITC_SHIFT),
   .min_channel = 1,
   .max_channel = 1,
   .circular_buffer = 0,
   },

{/* for read from nand */
   .bus_id = "as353x-nand",
   .io_addr = AS353X_NAND_FLASH_BASE + NAF_DATA,
   .mode = DMA_FROM_DEVICE,
   .cctl_opt = AS353X_NAF_WORDS_PER_LLI |
   (PL08X_CCTL_BSIZE_32 << PL08X_CCTL_SBURST_SHIFT) |
   (PL08X_CCTL_BSIZE_32 << PL08X_CCTL_DBURST_SHIFT) |
   (PL08X_CCTL_WIDTH_32 << PL08X_CCTL_SWIDTH_SHIFT) |
   (PL08X_CCTL_WIDTH_32 << PL08X_CCTL_DWIDTH_SHIFT) |
   (PL08X_CCTL_MASTER_2 << PL08X_CCTL_SMASTER_SHIFT) |
   (1 << PL08X_CCTL_DINCR_SHIFT) |
   (0 << PL08X_CCTL_TIC_SHIFT) ,
   .config_base = (DMA_NAF_LINE << PL08X_CCFG_DPERI_SHIFT) |
   (PL08X_CCFG_FCTL_PERI_TO_MEM << PL08X_CCFG_FCTL_SHIFT) |
   (1 << PL08X_CCFG_IE_SHIFT) | (1 << PL08X_CCFG_ITC_SHIFT),
   .min_channel = 1,
   .max_channel = 1,
   .circular_buffer = 0,
   },

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